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274 lines
19 KiB
C
274 lines
19 KiB
C
/* prim_templates.h
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* vi:ts=4 sw=4
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*
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* (c) Copyright 2012 Hewlett-Packard Development Company, L.P.
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* Licensed under the Apache License, Version 2.0 (the "License"); you may
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* not use this file except in compliance with the License. You may obtain
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* a copy of the License at http://www.apache.org/licenses/LICENSE-2.0.
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express
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* or implied. See the License for the specific language governing
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* permissions and limitations under the License. Algorithms used by
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* this code may be covered by patents by HP, Microsoft, or other parties.
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*/
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#pragma once
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#include "prim_avxsse.h"
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/* These are prototypes for SSE (potentially NEON) routines that do a
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* simple SSE operation over an array of data. Since so much of this
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* code is shared except for the operation itself, these prototypes are
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* used rather than duplicating code. The naming convention depends on
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* the parameters: S=Source param; C=Constant; D=Destination.
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* All the macros have parameters for a fallback procedure if the data
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* is too small and an operation "the slow way" for use at 16-byte edges.
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*/
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/* SSE3 note: If someone needs to support an SSE2 version of these without
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* SSE3 support, an alternative version could be added that merely checks
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* that 16-byte alignment on both destination and source(s) can be
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* achieved, rather than use LDDQU for unaligned reads.
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*/
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/* Note: the compiler is good at turning (16/sizeof(_type_)) into a constant.
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* It easily can't do that if the value is stored in a variable.
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* So don't save it as an intermediate value.
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*/
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/* ----------------------------------------------------------------------------
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* SCD = Source, Constant, Destination
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*/
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#define SSE3_SCD_ROUTINE(_name_, _type_, _fallback_, _op_, _op_type_, _slowWay_) \
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static pstatus_t _name_(const _type_* WINPR_RESTRICT pSrc, UINT32 val, \
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_type_* WINPR_RESTRICT pDst, UINT32 ulen) \
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{ \
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size_t len = ulen; \
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INT32 shifts = 0; \
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const _type_* sptr = pSrc; \
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_type_* dptr = pDst; \
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if (val == 0) \
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return PRIMITIVES_SUCCESS; \
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if (val >= 16) \
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return -1; \
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if (sizeof(_type_) == 1) \
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shifts = 1; \
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else if (sizeof(_type_) == 2) \
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shifts = 2; \
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else if (sizeof(_type_) == 4) \
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shifts = 3; \
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else if (sizeof(_type_) == 8) \
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shifts = 4; \
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/* Use 8 128-bit SSE registers. */ \
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size_t count = len >> (8 - shifts); \
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len -= count << (8 - shifts); \
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\
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while (count--) \
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{ \
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__m128i xmm0 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm1 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm2 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm3 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm4 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm5 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm6 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm7 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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xmm0 = _op_(xmm0, (_op_type_)val); \
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xmm1 = _op_(xmm1, (_op_type_)val); \
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xmm2 = _op_(xmm2, (_op_type_)val); \
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xmm3 = _op_(xmm3, (_op_type_)val); \
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xmm4 = _op_(xmm4, (_op_type_)val); \
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xmm5 = _op_(xmm5, (_op_type_)val); \
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xmm6 = _op_(xmm6, (_op_type_)val); \
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xmm7 = _op_(xmm7, (_op_type_)val); \
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STORE_SI128(dptr, xmm0); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm1); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm2); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm3); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm4); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm5); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm6); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm7); \
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dptr += (16 / sizeof(_type_)); \
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} \
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\
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/* Use a single 128-bit SSE register. */ \
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count = len >> (5 - shifts); \
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len -= count << (5 - shifts); \
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while (count--) \
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{ \
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__m128i xmm0 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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xmm0 = _op_(xmm0, (_op_type_)val); \
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STORE_SI128(dptr, xmm0); \
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dptr += (16 / sizeof(_type_)); \
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} \
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/* Finish off the remainder. */ \
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while (len--) \
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{ \
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_slowWay_; \
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} \
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return PRIMITIVES_SUCCESS; \
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}
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/* ----------------------------------------------------------------------------
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* SCD = Source, Constant, Destination
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* PRE = preload xmm0 with the constant.
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*/
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#define SSE3_SCD_PRE_ROUTINE(_name_, _type_, _fallback_, _op_, _slowWay_) \
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static pstatus_t _name_(const _type_* WINPR_RESTRICT pSrc, _type_ val, \
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_type_* WINPR_RESTRICT pDst, INT32 ilen) \
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{ \
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size_t len = WINPR_ASSERTING_INT_CAST(size_t, ilen); \
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int shifts = 0; \
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const _type_* sptr = pSrc; \
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_type_* dptr = pDst; \
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__m128i xmm0; \
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if (sizeof(_type_) == 1) \
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shifts = 1; \
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else if (sizeof(_type_) == 2) \
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shifts = 2; \
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else if (sizeof(_type_) == 4) \
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shifts = 3; \
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else if (sizeof(_type_) == 8) \
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shifts = 4; \
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/* Use 4 128-bit SSE registers. */ \
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size_t count = len >> (7 - shifts); \
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len -= count << (7 - shifts); \
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xmm0 = mm_set1_epu32(val); \
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for (size_t x = 0; x < count; x++) \
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{ \
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__m128i xmm1 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm2 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm3 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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__m128i xmm4 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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xmm1 = _op_(xmm1, xmm0); \
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xmm2 = _op_(xmm2, xmm0); \
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xmm3 = _op_(xmm3, xmm0); \
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xmm4 = _op_(xmm4, xmm0); \
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STORE_SI128(dptr, xmm1); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm2); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm3); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm4); \
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dptr += (16 / sizeof(_type_)); \
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} \
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/* Use a single 128-bit SSE register. */ \
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count = len >> (5 - shifts); \
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len -= count << (5 - shifts); \
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for (size_t x = 0; x < count; x++) \
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{ \
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__m128i xmm1 = LOAD_SI128(sptr); \
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sptr += (16 / sizeof(_type_)); \
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xmm1 = _op_(xmm1, xmm0); \
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STORE_SI128(dptr, xmm1); \
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dptr += (16 / sizeof(_type_)); \
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} \
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/* Finish off the remainder. */ \
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for (size_t x = 0; x < len; x++) \
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{ \
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_slowWay_; \
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} \
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return PRIMITIVES_SUCCESS; \
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}
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/* ----------------------------------------------------------------------------
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* SSD = Source1, Source2, Destination
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*/
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#define SSE3_SSD_ROUTINE(_name_, _type_, _fallback_, _op_, _slowWay_) \
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static pstatus_t _name_(const _type_* WINPR_RESTRICT pSrc1, \
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const _type_* WINPR_RESTRICT pSrc2, _type_* WINPR_RESTRICT pDst, \
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UINT32 ulen) \
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{ \
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size_t len = ulen; \
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int shifts = 0; \
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const _type_* sptr1 = pSrc1; \
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const _type_* sptr2 = pSrc2; \
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_type_* dptr = pDst; \
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size_t count; \
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if (sizeof(_type_) == 1) \
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shifts = 1; \
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else if (sizeof(_type_) == 2) \
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shifts = 2; \
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else if (sizeof(_type_) == 4) \
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shifts = 3; \
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else if (sizeof(_type_) == 8) \
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shifts = 4; \
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/* Use 4 128-bit SSE registers. */ \
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count = len >> (7 - shifts); \
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len -= count << (7 - shifts); \
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/* Aligned loads */ \
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while (count--) \
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{ \
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__m128i xmm0 = LOAD_SI128(sptr1); \
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sptr1 += (16 / sizeof(_type_)); \
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__m128i xmm1 = LOAD_SI128(sptr1); \
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sptr1 += (16 / sizeof(_type_)); \
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__m128i xmm2 = LOAD_SI128(sptr1); \
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sptr1 += (16 / sizeof(_type_)); \
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__m128i xmm3 = LOAD_SI128(sptr1); \
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sptr1 += (16 / sizeof(_type_)); \
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__m128i xmm4 = LOAD_SI128(sptr2); \
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sptr2 += (16 / sizeof(_type_)); \
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__m128i xmm5 = LOAD_SI128(sptr2); \
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sptr2 += (16 / sizeof(_type_)); \
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__m128i xmm6 = LOAD_SI128(sptr2); \
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sptr2 += (16 / sizeof(_type_)); \
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__m128i xmm7 = LOAD_SI128(sptr2); \
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sptr2 += (16 / sizeof(_type_)); \
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xmm0 = _op_(xmm0, xmm4); \
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xmm1 = _op_(xmm1, xmm5); \
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xmm2 = _op_(xmm2, xmm6); \
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xmm3 = _op_(xmm3, xmm7); \
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STORE_SI128(dptr, xmm0); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm1); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm2); \
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dptr += (16 / sizeof(_type_)); \
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STORE_SI128(dptr, xmm3); \
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dptr += (16 / sizeof(_type_)); \
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} \
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/* Use a single 128-bit SSE register. */ \
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count = len >> (5 - shifts); \
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len -= count << (5 - shifts); \
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while (count--) \
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{ \
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__m128i xmm0 = LOAD_SI128(sptr1); \
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sptr1 += (16 / sizeof(_type_)); \
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__m128i xmm1 = LOAD_SI128(sptr2); \
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sptr2 += (16 / sizeof(_type_)); \
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xmm0 = _op_(xmm0, xmm1); \
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STORE_SI128(dptr, xmm0); \
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dptr += (16 / sizeof(_type_)); \
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} \
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/* Finish off the remainder. */ \
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while (len--) \
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{ \
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_slowWay_; \
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} \
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return PRIMITIVES_SUCCESS; \
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}
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