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fpga: fix stutter reported by golint

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This commit is contained in:
Dmitry Rozhkov 2020-01-30 15:17:27 +02:00
parent 7695e450de
commit 456c8f3ff1
6 changed files with 43 additions and 42 deletions
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4
cmd/fpga_crihook/main.go
View File

@ -175,7 +175,7 @@ func (he *hookEnv) getFPGAParams(config *Config) ([]fpgaParams, error) {
if dev.processed {
continue
}
port, err := fpga.NewFpgaPort(deviceName)
port, err := fpga.NewPort(deviceName)
if err != nil {
return nil, err
}
@ -244,7 +244,7 @@ func (he *hookEnv) process(reader io.Reader) error {
}
for _, params := range paramslist {
port, err := fpga.NewFpgaPort(params.portDevice)
port, err := fpga.NewPort(params.portDevice)
if err != nil {
return err
}

14
cmd/fpga_tool/fpga_tool.go
View File

@ -178,9 +178,9 @@ func fpgaInfo(fname string, quiet bool) error {
}
func fmeInfo(fname string, quiet bool) error {
var f fpga.FpgaFME
var f fpga.FME
var err error
f, err = fpga.NewFpgaFME(fname)
f, err = fpga.NewFME(fname)
if err != nil {
return err
}
@ -188,7 +188,7 @@ func fmeInfo(fname string, quiet bool) error {
return printFpgaFME(f, quiet)
}
func printFpgaFME(f fpga.FpgaFME, quiet bool) (err error) {
func printFpgaFME(f fpga.FME, quiet bool) (err error) {
fmt.Println("//****** FME ******//")
fmt.Printf("Name : %s\n", f.GetName())
fmt.Printf("Device Node : %s\n", f.GetDevPath())
@ -215,9 +215,9 @@ func printFpgaFME(f fpga.FpgaFME, quiet bool) (err error) {
}
func portInfo(fname string, quiet bool) error {
var f fpga.FpgaPort
var f fpga.Port
var err error
f, err = fpga.NewFpgaPort(fname)
f, err = fpga.NewPort(fname)
if err != nil {
return err
}
@ -225,7 +225,7 @@ func portInfo(fname string, quiet bool) error {
return printFpgaPort(f, quiet)
}
func printFpgaPort(f fpga.FpgaPort, quiet bool) (err error) {
func printFpgaPort(f fpga.Port, quiet bool) (err error) {
fmt.Println("//****** PORT ******//")
fmt.Printf("Name : %s\n", f.GetName())
fmt.Printf("Device Node : %s\n", f.GetDevPath())
@ -285,7 +285,7 @@ func printPCIeInfo(pci *fpga.PCIDevice, quiet bool) {
}
func doPR(dev, fname string, dryRun, quiet bool) (err error) {
fp, err := fpga.NewFpgaPort(dev)
fp, err := fpga.NewPort(dev)
if err != nil {
return
}

16
pkg/fpga/dfl_linux.go
View File

@ -32,7 +32,7 @@ const (
// DflFME represent DFL FPGA FME device
type DflFME struct {
FpgaFME
FME
DevPath string
SysFsPath string
Name string
@ -54,7 +54,7 @@ func (f *DflFME) Close() error {
}
// NewDflFME Opens device
func NewDflFME(dev string) (FpgaFME, error) {
func NewDflFME(dev string) (FME, error) {
fme := &DflFME{DevPath: dev}
// check that kernel API is compatible
if _, err := fme.GetAPIVersion(); err != nil {
@ -71,7 +71,7 @@ func NewDflFME(dev string) (FpgaFME, error) {
// DflPort represent DFL FPGA Port device
type DflPort struct {
FpgaPort
Port
DevPath string
SysFsPath string
Name string
@ -79,7 +79,7 @@ type DflPort struct {
Dev string
AFUID string
ID string
FME FpgaFME
FME FME
}
// Close closes open device
@ -94,7 +94,7 @@ func (f *DflPort) Close() error {
}
// NewDflPort Opens device
func NewDflPort(dev string) (FpgaPort, error) {
func NewDflPort(dev string) (Port, error) {
port := &DflPort{DevPath: dev}
// check that kernel API is compatible
if _, err := port.GetAPIVersion(); err != nil {
@ -157,7 +157,7 @@ func (f *DflPort) PortReset() error {
// PortGetInfo Retrieve information about the fpga port.
// Driver fills the info in provided struct dfl_fpga_port_info.
// * Return: 0 on success, -errno on failure.
func (f *DflPort) PortGetInfo() (ret FpgaPortInfo, err error) {
func (f *DflPort) PortGetInfo() (ret PortInfo, err error) {
var value DflFpgaPortInfo
value.Argsz = uint32(unsafe.Sizeof(value))
_, err = ioctlDev(f.DevPath, DFL_FPGA_PORT_GET_INFO, uintptr(unsafe.Pointer(&value)))
@ -174,7 +174,7 @@ func (f *DflPort) PortGetInfo() (ret FpgaPortInfo, err error) {
// * Caller provides struct dfl_fpga_port_region_info with index value set.
// * Driver returns the region info in other fields.
// * Return: 0 on success, -errno on failure.
func (f *DflPort) PortGetRegionInfo(index uint32) (ret FpgaPortRegionInfo, err error) {
func (f *DflPort) PortGetRegionInfo(index uint32) (ret PortRegionInfo, err error) {
var value DflFpgaPortRegionInfo
value.Argsz = uint32(unsafe.Sizeof(value))
value.Index = index
@ -351,7 +351,7 @@ func (f *DflPort) GetPCIDevice() (*PCIDevice, error) {
}
// GetFME returns FPGA FME device for this port
func (f *DflPort) GetFME() (fme FpgaFME, err error) {
func (f *DflPort) GetFME() (fme FME, err error) {
if f.FME != nil {
return f.FME, nil
}

10
pkg/fpga/fpga_linux.go
View File

@ -41,8 +41,8 @@ func CanonizeID(ID string) string {
return strings.ToLower(strings.Replace(strings.TrimSpace(ID), "-", "", -1))
}
// NewFpgaPort returns FpgaPort for specified device node
func NewFpgaPort(fname string) (FpgaPort, error) {
// NewPort returns Port for specified device node
func NewPort(fname string) (Port, error) {
if strings.IndexByte(fname, byte('/')) < 0 {
fname = filepath.Join("/dev", fname)
}
@ -56,8 +56,8 @@ func NewFpgaPort(fname string) (FpgaPort, error) {
return nil, errors.Errorf("unknown type of FPGA port %s", fname)
}
// NewFpgaFME returns FpgaFME for specified device node
func NewFpgaFME(fname string) (FpgaFME, error) {
// NewFME returns FME for specified device node
func NewFME(fname string) (FME, error) {
if strings.IndexByte(fname, byte('/')) < 0 {
fname = filepath.Join("/dev", fname)
}
@ -89,7 +89,7 @@ func ListFpgaDevices() (FMEs, Ports []string) {
return
}
func genericPortPR(f FpgaPort, bs bitstream.File, dryRun bool) error {
func genericPortPR(f Port, bs bitstream.File, dryRun bool) error {
fme, err := f.GetFME()
if err != nil {
return err

16
pkg/fpga/intel_fpga_linux.go
View File

@ -32,7 +32,7 @@ const (
// IntelFpgaFME represent Intel FPGA FME device
type IntelFpgaFME struct {
FpgaFME
FME
DevPath string
SysFsPath string
Name string
@ -51,7 +51,7 @@ func (f *IntelFpgaFME) Close() error {
}
// NewIntelFpgaFME Opens device
func NewIntelFpgaFME(dev string) (FpgaFME, error) {
func NewIntelFpgaFME(dev string) (FME, error) {
fme := &IntelFpgaFME{DevPath: dev}
// check that kernel API is compatible
if _, err := fme.GetAPIVersion(); err != nil {
@ -68,7 +68,7 @@ func NewIntelFpgaFME(dev string) (FpgaFME, error) {
// IntelFpgaPort represent IntelFpga FPGA Port device
type IntelFpgaPort struct {
FpgaPort
Port
DevPath string
SysFsPath string
Name string
@ -76,7 +76,7 @@ type IntelFpgaPort struct {
Dev string
AFUID string
ID string
FME FpgaFME
FME FME
}
// Close closes open device
@ -88,7 +88,7 @@ func (f *IntelFpgaPort) Close() error {
}
// NewIntelFpgaPort Opens device
func NewIntelFpgaPort(dev string) (FpgaPort, error) {
func NewIntelFpgaPort(dev string) (Port, error) {
port := &IntelFpgaPort{DevPath: dev}
// check that kernel API is compatible
if _, err := port.GetAPIVersion(); err != nil {
@ -153,7 +153,7 @@ func (f *IntelFpgaPort) PortReset() error {
// PortGetInfo Retrieve information about the fpga port.
// Driver fills the info in provided struct IntelFpga_fpga_port_info.
// * Return: 0 on success, -errno on failure.
func (f *IntelFpgaPort) PortGetInfo() (ret FpgaPortInfo, err error) {
func (f *IntelFpgaPort) PortGetInfo() (ret PortInfo, err error) {
var value IntelFpgaPortInfo
value.Argsz = uint32(unsafe.Sizeof(value))
_, err = ioctlDev(f.DevPath, FPGA_PORT_GET_INFO, uintptr(unsafe.Pointer(&value)))
@ -170,7 +170,7 @@ func (f *IntelFpgaPort) PortGetInfo() (ret FpgaPortInfo, err error) {
// * Caller provides struct IntelFpga_fpga_port_region_info with index value set.
// * Driver returns the region info in other fields.
// * Return: 0 on success, -errno on failure.
func (f *IntelFpgaPort) PortGetRegionInfo(index uint32) (ret FpgaPortRegionInfo, err error) {
func (f *IntelFpgaPort) PortGetRegionInfo(index uint32) (ret PortRegionInfo, err error) {
var value IntelFpgaPortRegionInfo
value.Argsz = uint32(unsafe.Sizeof(value))
value.Index = index
@ -347,7 +347,7 @@ func (f *IntelFpgaPort) GetPCIDevice() (*PCIDevice, error) {
}
// GetFME returns FPGA FME device for this port
func (f *IntelFpgaPort) GetFME() (fme FpgaFME, err error) {
func (f *IntelFpgaPort) GetFME() (fme FME, err error) {
if f.FME != nil {
return f.FME, nil
}

25
pkg/fpga/interfaces.go
View File

@ -15,8 +15,9 @@
package fpga
import (
"github.com/intel/intel-device-plugins-for-kubernetes/pkg/fpga/bitstream"
"io"
"github.com/intel/intel-device-plugins-for-kubernetes/pkg/fpga/bitstream"
)
type commonFpgaAPI interface {
@ -41,8 +42,8 @@ type commonFpgaAPI interface {
GetPCIDevice() (*PCIDevice, error)
}
// FpgaFME represent interfaces provided by management interface of FPGA
type FpgaFME interface {
// FME represent interfaces provided by management interface of FPGA
type FME interface {
// Kernel IOCTL interfaces for FPGA ports:
commonFpgaAPI
// PortPR does Partial Reconfiguration based on Port ID and Buffer (Image)
@ -73,8 +74,8 @@ type FpgaFME interface {
// GetPort(uint32) (FpgaPort, error)
}
// FpgaPort represent interfaces provided by AFU port of FPGA
type FpgaPort interface {
// Port represent interfaces provided by AFU port of FPGA
type Port interface {
// Kernel IOCTL interfaces for FPGA ports:
commonFpgaAPI
// PortReset Reset the FPGA Port and its AFU. No parameters are supported.
@ -86,13 +87,13 @@ type FpgaPort interface {
// PortGetInfo Retrieve information about the fpga port.
// Driver fills the info in provided struct dfl_fpga_port_info.
// * Return: 0 on success, -errno on failure.
PortGetInfo() (FpgaPortInfo, error)
PortGetInfo() (PortInfo, error)
// PortGetRegionInfo Retrieve information about the fpga port.
// * Retrieve information about a device memory region.
// * Caller provides struct dfl_fpga_port_region_info with index value set.
// * Driver returns the region info in other fields.
// * Return: 0 on success, -errno on failure.
PortGetRegionInfo(index uint32) (FpgaPortRegionInfo, error)
PortGetRegionInfo(index uint32) (PortRegionInfo, error)
// TODO: (not implemented IOCTLs)
// Port DMA map / unmap
// UMSG enable / disable / set-mode / set-base-addr (intel-fpga)
@ -101,7 +102,7 @@ type FpgaPort interface {
// Interfaces for device discovery and accessing properties
// GetFME returns FPGA FME device for this port
GetFME() (FpgaFME, error)
GetFME() (FME, error)
// GetPortID returns ID of the FPGA port within physical device
GetPortID() (uint32, error)
// GetAcceleratorTypeUUID returns AFU UUID for port
@ -112,15 +113,15 @@ type FpgaPort interface {
PR(bitstream.File, bool) error
}
// FpgaPortInfo is a unified port info between drivers
type FpgaPortInfo struct {
// PortInfo is a unified port info between drivers
type PortInfo struct {
Flags uint32
Regions uint32
Umsgs uint32
}
// FpgaPortRegionInfo is a unified Port Region info between drivers
type FpgaPortRegionInfo struct {
// PortRegionInfo is a unified Port Region info between drivers
type PortRegionInfo struct {
Flags uint32
Index uint32
Size uint64