mirror of
https://github.com/intel/intel-device-plugins-for-kubernetes.git
synced 2025-06-03 03:59:37 +00:00
fpga_crihook: check if requested AF is programmed
Check if programmed AF id is equal to the requested AF id after re-programming a device.
This commit is contained in:
parent
9df1afdf43
commit
b1b2edf1b8
@ -189,6 +189,16 @@ func (he *hookEnv) programBitStream(params *fpgaParams, fpgaBitStreamPath string
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if err != nil {
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if err != nil {
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return fmt.Errorf("failed to program AFU %s to region %s: error: %v, output: %s", params.afu, params.region, err, string(output))
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return fmt.Errorf("failed to program AFU %s to region %s: error: %v, output: %s", params.afu, params.region, err, string(output))
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}
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}
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programmedAfu, err := he.getProgrammedAfu(params.devNum)
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if err != nil {
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return err
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}
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if programmedAfu != params.afu {
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return fmt.Errorf("programmed function %s instead of %s", programmedAfu, params.afu)
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}
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return nil
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return nil
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}
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}
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@ -243,36 +243,61 @@ func TestValidateBitstream(t *testing.T) {
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}
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}
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}
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}
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func genFpgaConfAction(he *hookEnv, afuIDTemplate string, returnError bool) fakeexec.FakeCombinedOutputAction {
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return func() ([]byte, error) {
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if returnError {
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return []byte("error"), &fakeexec.FakeExitError{Status: 1}
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}
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he.afuIDTemplate = afuIDTemplate // emulate reprogramming
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return []byte(""), nil
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}
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}
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func TestProgramBitStream(t *testing.T) {
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func TestProgramBitStream(t *testing.T) {
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tcases := []struct {
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tcases := []struct {
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params *fpgaParams
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params *fpgaParams
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expectedErr bool
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afuIDTemplate string
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fakeAction []fakeexec.FakeCombinedOutputAction
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newAFUIDTemplate string
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expectedErr bool
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fpgaconfErr bool
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}{
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}{
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{
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{
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params: &fpgaParams{
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params: &fpgaParams{
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devNum: "0",
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region: "ce48969398f05f33946d560708be108a",
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region: "ce48969398f05f33946d560708be108a",
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afu: "f7df405cbd7acf7222f144b0b93acd18"},
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afu: "f7df405cbd7acf7222f144b0b93acd18"},
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expectedErr: false,
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_d8424dc4a4a3c413f89e433683f9040b",
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fakeAction: []fakeexec.FakeCombinedOutputAction{
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newAFUIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_f7df405cbd7acf7222f144b0b93acd18",
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func() ([]byte, error) { return []byte(""), nil },
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},
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},
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{
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params: &fpgaParams{"", "", ""},
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expectedErr: true,
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fpgaconfErr: true,
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},
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},
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{
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{
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params: &fpgaParams{
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params: &fpgaParams{
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devNum: "0",
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region: "ce48969398f05f33946d560708be108a",
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region: "ce48969398f05f33946d560708be108a",
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afu: "f7df405cbd7acf7222f144b0b93acd18"},
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afu: "d8424dc4a4a3c413f89e433683f9040b"},
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expectedErr: true,
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/doesnt_exist",
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fakeAction: []fakeexec.FakeCombinedOutputAction{
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expectedErr: true,
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func() ([]byte, error) { return []byte("error"), &fakeexec.FakeExitError{Status: 1} },
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},
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},
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{
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params: &fpgaParams{
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devNum: "0",
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region: "ce48969398f05f33946d560708be108a",
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afu: "d8424dc4a4a3c413f89e433683f9040b"},
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_f7df405cbd7acf7222f144b0b93acd18",
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newAFUIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_f7df405cbd7acf7222f144b0b93acd18",
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expectedErr: true,
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},
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},
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}
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}
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for _, tc := range tcases {
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for _, tc := range tcases {
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fcmd := fakeexec.FakeCmd{CombinedOutputScript: tc.fakeAction}
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he := newHookEnv("", "", nil, tc.afuIDTemplate)
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execer := fakeexec.FakeExec{CommandScript: genFakeActions(&fcmd, len(fcmd.CombinedOutputScript))}
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actions := []fakeexec.FakeCombinedOutputAction{genFpgaConfAction(he, tc.newAFUIDTemplate, tc.fpgaconfErr)}
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he := newHookEnv("", "", &execer, "")
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fcmd := fakeexec.FakeCmd{CombinedOutputScript: actions}
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he.execer = &fakeexec.FakeExec{CommandScript: genFakeActions(&fcmd, len(fcmd.CombinedOutputScript))}
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err := he.programBitStream(tc.params, "")
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err := he.programBitStream(tc.params, "")
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if err != nil && !tc.expectedErr {
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if err != nil && !tc.expectedErr {
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t.Errorf("unexpected error: %v", err)
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t.Errorf("unexpected error: %v", err)
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@ -282,34 +307,38 @@ func TestProgramBitStream(t *testing.T) {
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func TestProcess(t *testing.T) {
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func TestProcess(t *testing.T) {
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tcases := []struct {
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tcases := []struct {
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stdinJSON string
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stdinJSON string
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configJSON string
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configJSON string
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afuIDTemplate string
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params *fpgaParams
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expectedErr bool
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afuIDTemplate string
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fakeCombinedOutputAction []fakeexec.FakeCombinedOutputAction
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newAFUIDTemplate string
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expectedErr bool
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fpgaconfErr bool
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gbsInfoAction fakeexec.FakeCombinedOutputAction
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}{
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}{
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{
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{
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params: &fpgaParams{
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devNum: "0",
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region: "ce48969398f05f33946d560708be108a",
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afu: "d8424dc4a4a3c413f89e433683f9040b"},
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stdinJSON: "stdin-correct.json",
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stdinJSON: "stdin-correct.json",
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configJSON: "config-correct.json",
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configJSON: "config-correct.json",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_already_programmed",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_f7df405cbd7acf7222f144b0b93acd18",
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expectedErr: false,
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gbsInfoAction: func() ([]byte, error) {
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fakeCombinedOutputAction: []fakeexec.FakeCombinedOutputAction{
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return ioutil.ReadFile("testdata/gbs-info-correct.json")
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func() ([]byte, error) {
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return ioutil.ReadFile("testdata/gbs-info-correct.json")
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},
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func() ([]byte, error) { return []byte(""), nil },
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},
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},
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},
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},
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{
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{
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stdinJSON: "stdin-correct.json",
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params: &fpgaParams{
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configJSON: "config-correct.json",
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devNum: "0",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_not_programmed_yet",
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region: "ce48969398f05f33946d560708be108a",
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expectedErr: false,
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afu: "f7df405cbd7acf7222f144b0b93acd18"},
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fakeCombinedOutputAction: []fakeexec.FakeCombinedOutputAction{
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stdinJSON: "stdin-correct.json",
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func() ([]byte, error) {
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configJSON: "config-correct.json",
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return ioutil.ReadFile("testdata/gbs-info-correct.json")
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_d8424dc4a4a3c413f89e433683f9040b",
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},
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newAFUIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_f7df405cbd7acf7222f144b0b93acd18",
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func() ([]byte, error) { return []byte(""), nil },
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gbsInfoAction: func() ([]byte, error) {
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return ioutil.ReadFile("testdata/gbs-info-correct.json")
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},
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},
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},
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},
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{
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{
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@ -331,7 +360,7 @@ func TestProcess(t *testing.T) {
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{
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{
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stdinJSON: "stdin-correct.json",
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stdinJSON: "stdin-correct.json",
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configJSON: "config-no-afu.json",
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configJSON: "config-no-afu.json",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_not_programmed_yet",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_d8424dc4a4a3c413f89e433683f9040b",
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expectedErr: true,
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expectedErr: true,
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},
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},
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{
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{
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@ -342,30 +371,29 @@ func TestProcess(t *testing.T) {
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{
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{
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stdinJSON: "stdin-correct.json",
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stdinJSON: "stdin-correct.json",
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configJSON: "config-non-existing-bitstream.json",
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configJSON: "config-non-existing-bitstream.json",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_not_programmed_yet",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_d8424dc4a4a3c413f89e433683f9040b",
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expectedErr: true,
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expectedErr: true,
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},
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},
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{
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{
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stdinJSON: "stdin-correct.json",
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stdinJSON: "stdin-correct.json",
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configJSON: "config-correct.json",
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configJSON: "config-correct.json",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_not_programmed_yet",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_d8424dc4a4a3c413f89e433683f9040b",
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expectedErr: true,
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expectedErr: true,
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fakeCombinedOutputAction: []fakeexec.FakeCombinedOutputAction{
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gbsInfoAction: func() ([]byte, error) {
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func() ([]byte, error) {
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return ioutil.ReadFile("testdata/gbs-info-no-accelerator-type-uuid.json")
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return ioutil.ReadFile("testdata/gbs-info-no-accelerator-type-uuid.json")
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},
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},
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},
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},
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},
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{
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{
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params: &fpgaParams{
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devNum: "0",
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region: "ce48969398f05f33946d560708be108a",
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afu: "d8424dc4a4a3c413f89e433683f9040b"},
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stdinJSON: "stdin-correct.json",
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stdinJSON: "stdin-correct.json",
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configJSON: "config-correct.json",
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configJSON: "config-correct.json",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_not_programmed_yet",
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afuIDTemplate: "testdata/sys/class/fpga/intel-fpga-dev.%s/intel-fpga-port.%s/afu_id_d8424dc4a4a3c413f89e433683f9040b",
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expectedErr: true,
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expectedErr: true,
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fakeCombinedOutputAction: []fakeexec.FakeCombinedOutputAction{
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gbsInfoAction: func() ([]byte, error) {
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func() ([]byte, error) {
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return ioutil.ReadFile("testdata/gbs-info-correct.json")
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return ioutil.ReadFile("testdata/gbs-info-correct.json")
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},
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func() ([]byte, error) { return []byte("error"), &fakeexec.FakeExitError{Status: 1} },
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},
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},
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},
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},
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}
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}
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@ -376,10 +404,15 @@ func TestProcess(t *testing.T) {
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t.Fatalf("can't open file %s: %v", tc.stdinJSON, err)
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t.Fatalf("can't open file %s: %v", tc.stdinJSON, err)
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}
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}
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fcmd := fakeexec.FakeCmd{CombinedOutputScript: tc.fakeCombinedOutputAction}
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he := newHookEnv("testdata/intel.com/fpga", tc.configJSON, nil, tc.afuIDTemplate)
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execer := fakeexec.FakeExec{CommandScript: genFakeActions(&fcmd, len(fcmd.CombinedOutputScript))}
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actions := []fakeexec.FakeCombinedOutputAction{
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tc.gbsInfoAction,
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genFpgaConfAction(he, tc.newAFUIDTemplate, tc.fpgaconfErr),
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}
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fcmd := fakeexec.FakeCmd{CombinedOutputScript: actions}
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he.execer = &fakeexec.FakeExec{CommandScript: genFakeActions(&fcmd, len(fcmd.CombinedOutputScript))}
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he := newHookEnv("testdata/intel.com/fpga", tc.configJSON, &execer, tc.afuIDTemplate)
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err = he.process(stdin)
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err = he.process(stdin)
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if err != nil && !tc.expectedErr {
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if err != nil && !tc.expectedErr {
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