Merge pull request #339 from bart0sh/PR0076-test-coverage-bitstream

fpga bitstream module: increase test coverage

.gitignore

@@ -15,7 +15,6 @@ cmd/qat_plugin/qat_plugin
 deployments/fpga_admissionwebhook/base/intel-fpga-webhook-certs-secret
 
 *.h
-*.gbs
 *.gbs.*
 *.aocx
 *.aocx.*

pkg/fpga/bitstream/bitstream_test.go

@@ -15,33 +15,9 @@
 package bitstream
 
 import (
-	"io/ioutil"
-	"os"
-	"path"
 	"testing"
-
-	"github.com/pkg/errors"
-	"k8s.io/utils/exec"
-	fakeexec "k8s.io/utils/exec/testing"
 )
 
-func createTestDirs(sysfs string, sysfsDirs []string, sysfsFiles map[string][]byte) error {
-	for _, sysfsdir := range sysfsDirs {
-		err := os.MkdirAll(path.Join(sysfs, sysfsdir), 0755)
-		if err != nil {
-			return errors.Wrap(err, "Failed to create fake device directory")
-		}
-	}
-	for filename, body := range sysfsFiles {
-		err := ioutil.WriteFile(path.Join(sysfs, filename), body, 0644)
-		if err != nil {
-			return errors.Wrap(err, "Failed to create fake vendor file")
-		}
-	}
-
-	return nil
-}
-
 func TestGetFPGABitstream(t *testing.T) {
 	var fpgaBitStreamDir = "testdata/intel.com/fpga"
 
@@ -52,6 +28,13 @@ func TestGetFPGABitstream(t *testing.T) {
 		afu          string
 		expectedErr  bool
 	}{
+		{
+			name:         "Correct OPAE bitstream file",
+			bitstreamDir: fpgaBitStreamDir,
+			region:       "69528db6eb31577a8c3668f9faa081f6",
+			afu:          "d8424dc4a4a3c413f89e433683f9040b",
+			expectedErr:  false,
+		},
 		{
 			name:         "Get broken OPAE bistream file",
 			bitstreamDir: fpgaBitStreamDir,
@@ -89,12 +72,32 @@ func TestGetFPGABitstream(t *testing.T) {
 
 }
 
-func genFakeActions(fcmd *fakeexec.FakeCmd, num int) []fakeexec.FakeCommandAction {
-	var actions []fakeexec.FakeCommandAction
-	for i := 0; i < num; i++ {
-		actions = append(actions, func(cmd string, args ...string) exec.Cmd {
-			return fakeexec.InitFakeCmd(fcmd, cmd, args...)
+func TestOpen(t *testing.T) {
+	tcases := []struct {
+		name          string
+		fname         string
+		expectedError bool
+	}{
+		{
+			name:  "correct GBS",
+			fname: "testdata/intel.com/fpga/69528db6eb31577a8c3668f9faa081f6/d8424dc4a4a3c413f89e433683f9040b.gbs",
+		},
+		{
+			name:          "Unsupported file format",
+			fname:         "test.unsupported",
+			expectedError: true,
+		},
+	}
+
+	for _, tc := range tcases {
+		t.Run(tc.name, func(t *testing.T) {
+			_, err := Open(tc.fname)
+			if tc.expectedError && err == nil {
+				t.Error("unexpected success")
+			}
+			if !tc.expectedError && err != nil {
+				t.Errorf("unexpected error: %+v", err)
+			}
 		})
 	}
-	return actions
 }

pkg/fpga/bitstream/gbs_test.go

@@ -0,0 +1,96 @@
+// Copyright 2019 Intel Corporation. All Rights Reserved.
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+package bitstream
+
+import (
+	"path/filepath"
+	"testing"
+)
+
+func TestOpenGBS(t *testing.T) {
+	tcases := []struct {
+		name          string
+		fname         string
+		expectedError bool
+	}{
+		{
+			name:  "correct GBS",
+			fname: "testdata/intel.com/fpga/69528db6eb31577a8c3668f9faa081f6/d8424dc4a4a3c413f89e433683f9040b.gbs",
+		},
+		{
+			name:          "file doesn't exist",
+			fname:         "itdoesntexist.gbs",
+			expectedError: true,
+		},
+	}
+	for _, tc := range tcases {
+		t.Run(tc.name, func(t *testing.T) {
+			_, err := OpenGBS(tc.fname)
+			if tc.expectedError && err == nil {
+				t.Error("unexpected success")
+			}
+			if !tc.expectedError && err != nil {
+				t.Errorf("unexpected error: %+v", err)
+			}
+		})
+	}
+}
+
+func TestFileGBSMethods(t *testing.T) {
+	interfaceUUID := "69528db6eb31577a8c3668f9faa081f6"
+	typeUUID := "d8424dc4a4a3c413f89e433683f9040b"
+	gbs, err := OpenGBS(filepath.Join("testdata/intel.com/fpga", interfaceUUID, typeUUID) + ".gbs")
+	if err != nil {
+		t.Errorf("unexpected open error: %+v", err)
+		return
+	}
+
+	reader := gbs.RawBitstreamReader()
+	if reader == nil {
+		t.Error("unexpected nil bitstream reader")
+		return
+	}
+
+	_, err = gbs.RawBitstreamData()
+	if err != nil {
+		t.Errorf("unexpected data error: %+v", err)
+		return
+	}
+
+	intUUID := gbs.InterfaceUUID()
+	if intUUID != interfaceUUID {
+		t.Errorf("unexpected Interface UUID value: %s", intUUID)
+	}
+
+	installPath := gbs.InstallPath("")
+	if installPath != filepath.Join(interfaceUUID, typeUUID)+".gbs" {
+		t.Errorf("unexpected Install Path value: %s", installPath)
+	}
+
+	typUUID := gbs.AcceleratorTypeUUID()
+	if typUUID != typeUUID {
+		t.Errorf("unexpected Accelerator type UUID value: %s", typUUID)
+	}
+
+	extraMD := gbs.ExtraMetadata()
+	if extraMD == nil || extraMD["Size"] != "1" {
+		t.Errorf("unexpected extra metadata: %+v", extraMD)
+	}
+
+	err = gbs.Close()
+	if err != nil {
+		t.Errorf("unexpected close error: %+v", err)
+	}
+}