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271bc0d29a
Currently we have hardcoded mapping from human readable names of AFs and FPGA regions like arria10-nlb0 to the resource names produced by the FPGA device plugin. This is not sustainable long term solution. Implement CRD based mappings so that a new mapping can be added or removed dynamically by cluster admins with CRD resources.
6 lines
80 B
Go
6 lines
80 B
Go
// +k8s:deepcopy-gen=package,register
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// +groupName=fpga.intel.com
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package v1
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